| # | Title | Type | Language | |||||||||||
| 1. | PCBLA final report rev. 5 by jason PC Based Logic Analyzer Final Report Team Members Jeff Earleson Jason Nielsen Advisors Dr James Irwin Mr Jos Sanchez May 13 2005 EE 452 Bradley University Electrical and Computer Engineering Abstract The PC Based Logic Analyzer 1s a device that determines the logical state High Low or Unknown of a signal then displays with respect to time the state in a Graphical User Interface GUI on a Personal Computer PC A Field Programmable Gate Array FPGA and ext |
PDF Manual | ENGLISH | |||||||||||
| # | Title | Type | Language | Download | ||||||||||
| 1. | PCBLA final report rev. 5 by jason PC Based Logic Analyzer Final Report Team Members Jeff Earleson Jason Nielsen Advisors Dr James Irwin Mr Jos Sanchez May 13 2005 EE 452 Bradley University Electrical and Computer Engineering Abstract The PC Based Logic Analyzer 1s a device that determines the logical state High Low or Unknown of a signal then displays with respect to time the state in a Graphical User Interface GUI on a Personal Computer PC A Field Programmable Gate Array FPGA and ext |
PDF Manual | ENGLISH |
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