NBSHS3905CDGEVB 83905 Evaluation Board User s Manual Device Description The NB3H83905CDG device is a 1 8 V 2 5 V or 3 3 V VDD core Crystal input 1 6 LVTTL LVCMOS fanout buffer with outputs powered by flexible 1 8 V 2 5 V or 3 3 V supply with VDD gt VDDO The core inputs accept a fundamental Parallel Resonant crystal from 3 MHz to 40 or Single Ended LVCMOS Clock from 3 MHz to 100 MHz Core supply must be equal or greater voltage than the
NBSHS3905CDGEVB 83905 Evaluation Board User s Manual Device Description The NB3H83905CDG device is a 1 8 V 2 5 V or 3 3 V VDD core Crystal input 1 6 LVTTL LVCMOS fanout buffer with outputs powered by flexible 1 8 V 2 5 V or 3 3 V supply with VDD gt VDDO The core inputs accept a fundamental Parallel Resonant crystal from 3 MHz to 40 or Single Ended LVCMOS Clock from 3 MHz to 100 MHz Core supply must be equal or greater voltage than the